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Can You Divide Numbers In Memeory But Not In Register

Associates - Registers


Processor operations mostly involve processing data. This data tin be stored in retentivity and accessed from thereon. However, reading data from and storing information into memory slows down the processor, as it involves complicated processes of sending the data asking across the control bus and into the retentiveness storage unit and getting the information through the same channel.

To speed up the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store data elements for processing without having to access the retentivity. A express number of registers are built into the processor bit.

Processor Registers

There are 10 32-bit and six 16-chip processor registers in IA-32 compages. The registers are grouped into three categories −

  • General registers,
  • Control registers, and
  • Segment registers.

The general registers are farther divided into the following groups −

  • Data registers,
  • Pointer registers, and
  • Index registers.

Data Registers

Four 32-bit data registers are used for arithmetics, logical, and other operations. These 32-bit registers tin can exist used in three ways −

  • Every bit complete 32-bit data registers: EAX, EBX, ECX, EDX.

  • Lower halves of the 32-bit registers can exist used as 4 16-bit data registers: AX, BX, CX and DX.

  • Lower and higher halves of the above-mentioned four 16-scrap registers can be used as eight 8-chip data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers accept specific use in arithmetical operations.

AX is the chief accumulator; it is used in input/output and virtually arithmetics instructions. For example, in multiplication operation, 1 operand is stored in EAX or AX or AL annals according to the size of the operand.

BX is known every bit the base of operations register, as information technology could be used in indexed addressing.

CX is known as the count register, as the ECX, CX registers shop the loop count in iterative operations.

DX is known every bit the data register. It is likewise used in input/output operations. It is likewise used with AX register forth with DX for multiply and divide operations involving large values.

Arrow Registers

The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-bit correct portions IP, SP, and BP. There are three categories of pointer registers −

  • Instruction Pointer (IP) − The 16-bit IP annals stores the offset address of the next instruction to be executed. IP in association with the CS register (as CS:IP) gives the complete accost of the current instruction in the code segment.

  • Stack Pointer (SP) − The sixteen-bit SP register provides the kickoff value inside the programme stack. SP in association with the SS register (SS:SP) refers to be electric current position of information or address within the program stack.

  • Base Arrow (BP) − The xvi-bit BP register mainly helps in referencing the parameter variables passed to a subroutine. The accost in SS annals is combined with the offset in BP to get the location of the parameter. BP can as well exist combined with DI and SI as base register for special addressing.

Pointer Registers

Index Registers

The 32-bit index registers, ESI and EDI, and their sixteen-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. In that location are two sets of index pointers −

  • Source Index (SI) − It is used as source alphabetize for string operations.

  • Destination Alphabetize (DI) − It is used as destination index for cord operations.

Index Registers

Control Registers

The 32-bit instruction pointer register and the 32-bit flags register combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and modify the condition of the flags and some other conditional instructions test the value of these status flags to have the control flow to other location.

The mutual flag bits are:

  • Overflow Flag (OF) − Information technology indicates the overflow of a high-lodge bit (leftmost bit) of data after a signed arithmetics performance.

  • Direction Flag (DF) − It determines left or right management for moving or comparing string data. When the DF value is 0, the string functioning takes left-to-right management and when the value is set to 1, the string operation takes right-to-left direction.

  • Interrupt Flag (IF) − Information technology determines whether the external interrupts like keyboard entry, etc., are to be ignored or candy. Information technology disables the external interrupt when the value is 0 and enables interrupts when prepare to one.

  • Trap Flag (TF) − Information technology allows setting the operation of the processor in unmarried-step way. The DEBUG program we used sets the trap flag, then we could stride through the execution one instruction at a time.

  • Sign Flag (SF) − Information technology shows the sign of the event of an arithmetic performance. This flag is set according to the sign of a data item following the arithmetic performance. The sign is indicated by the high-order of leftmost scrap. A positive result clears the value of SF to 0 and negative issue sets it to 1.

  • Zero Flag (ZF) − Information technology indicates the upshot of an arithmetic or comparing operation. A nonzero event clears the zero flag to 0, and a zippo result sets information technology to 1.

  • Auxiliary Carry Flag (AF) − It contains the carry from scrap 3 to bit iv following an arithmetic operation; used for specialized arithmetic. The AF is set when a one-byte arithmetic functioning causes a behave from bit three into fleck 4.

  • Parity Flag (PF) − It indicates the total number of ane-bits in the event obtained from an arithmetics operation. An fifty-fifty number of i-bits clears the parity flag to 0 and an odd number of one-bits sets the parity flag to 1.

  • Comport Flag (CF) − Information technology contains the conduct of 0 or ane from a high-order flake (leftmost) after an arithmetic performance. It too stores the contents of last flake of a shift or rotate operation.

The following tabular array indicates the position of flag $.25 in the sixteen-bit Flags register:

Flag: O D I T Southward Z A P C
Bit no: 15 14 13 12 11 10 9 8 7 6 5 iv three two 1 0

Segment Registers

Segments are specific areas defined in a program for containing data, lawmaking and stack. There are three main segments −

  • Code Segment − It contains all the instructions to be executed. A 16-chip Code Segment register or CS annals stores the starting address of the code segment.

  • Data Segment − Information technology contains data, constants and work areas. A 16-bit Data Segment register or DS annals stores the starting accost of the data segment.

  • Stack Segment − It contains information and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS register stores the starting address of the stack.

Apart from the DS, CS and SS registers, there are other extra segment registers - ES (actress segment), FS and GS, which provide additional segments for storing information.

In assembly programming, a plan needs to access the memory locations. All memory locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by xvi or hexadecimal 10. And then, the rightmost hex digit in all such memory addresses is 0, which is not more often than not stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the exact location of data or instruction inside a segment, an showtime value (or displacement) is required. To reference whatsoever retentiveness location in a segment, the processor combines the segment address in the segment register with the offset value of the location.

Example

Await at the following simple programme to sympathise the use of registers in associates programming. This plan displays 9 stars on the screen along with a elementary message −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,one    ;file descriptor (stdout)    mov	eax,four    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,nine    ;message length    mov	ecx,s2   ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,four    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;system telephone call number (sys_exit)    int	0x80     ;call kernel 	 department	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times 9 db '*'        

When the above code is compiled and executed, information technology produces the following event −

Displaying nine stars *********        

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Source: https://www.tutorialspoint.com/assembly_programming/assembly_registers.htm

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